Design Through Verilog HDL (Record no. 7402)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00474nam a2200181Ia 4500 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | OSt |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20220622145207.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 220614s9999||||xx |||||||||||||| ||und|| |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9780471441489 |
| 040 ## - CATALOGING SOURCE | |
| Transcribing agency | |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Padmanabhan |
| 245 #0 - TITLE STATEMENT | |
| Title | Design Through Verilog HDL |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1st Edition |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Name of publisher, distributor, etc. | Wiley |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Electrical & Electronics Engineering |
| 856 ## - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | <a href="https://onlinelibrary.wiley.com/doi/book/10.1002/0471723002">https://onlinelibrary.wiley.com/doi/book/10.1002/0471723002</a> |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | E-Books |
| Source of classification or shelving scheme | Dewey Decimal Classification |
| Withdrawn status | Lost status | Damaged status | Not for loan | Home library | Current library | Date acquired | Total Checkouts | Date last seen | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|
| Kerala University of Digital Sciences, Innovation and Technology Knowledge Centre | Kerala University of Digital Sciences, Innovation and Technology Knowledge Centre | 14/06/2022 | 14/06/2022 | 14/06/2022 | E-Books |