000 00450nam a2200157Ia 4500
008 130318s9999 xx 000 0 und d
020 _a792383753
082 _a621.392 UMA/F
100 _aUmamageswaran, Kothanda
245 _aFormal semantics and proof techniques for optimizing VHDL models
260 _bKluwer Academic Publishers
_aBoston
_c1999
300 _a158
650 _aVHDL
700 _aPandey, Sheetanshu L
700 _aWilsey Philip A
999 _c1302
_d1302