Formal semantics and proof techniques for optimizing VHDL models
Material type:
TextPublication details: Kluwer Academic Publishers Boston 1999Description: 158ISBN: - 792383753
- 621.392 UMA/F
| Item type | Current library | Call number | Status | Date due | Barcode | |
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Kerala University of Digital Sciences, Innovation and Technology Knowledge Centre Applied Electronics | 621.392 UMA/F (Browse shelf(Opens below)) | Available | 1309 |
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| 621.392 BHA/V;1 A VHDL synthesis primer | 621.392 BHA/V;2 A VHDL synthesis primer | 621.392 PER/V VHDL | 621.392 UMA/F Formal semantics and proof techniques for optimizing VHDL models | 621.395 BAL/D Digital logic design principles | 621.395 BOS/P Printed circuits: Boards design and technology | 621.395 CAT/S Smart and sustainable power systems: Operation, planning and economics of insular electricity grids |
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